PCB Design and Simulation Challenges in 224G Interconnects
Presented at EDI CON Online 2023 (Oct 4, 2023) – Watch On-Demand
The fastest data rates being implemented in data center architecture is 224G PAM-4, which supports a variety of interconnect types between servers, routers, and other infrastructure. At the board and chip level, the PCB and package exhibit certain design challenges that can degrade signal integrity in 224G PAM-4 channels. To overcome these challenges, greater collaboration between PCB design applications and simulation applications is needed. In this presentation, we outline some of the design challenges present in boards and packages supporting 224G PAM-4 channels. We will explore signal integrity issues (crosstalk, losses, resonances) in boards and packages interfacing with 224G PAM-4 channels in simulation, and we qualify certain design guidelines using a new integrated design and simulation solution linking Altium and Ansys. Attendees will have a chance to see the typical design approaches that are being proposed and implemented in 224G PAM-4 channels.
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